A placement blockage is a region of the core where the placer may not put standard cells, or may only put a few. Designers use blockages to keep space free next to macros, to reserve room for routing or for later fixes, to protect sensitive circuits, or to stop cells from clumping in a corner. This article explains hard and partial placement blockages and routing blockages, and shows what a blockage in the middle of the 16x16 multiplier does to placement, utilization and wire length.
7 min read | Intermediate
What You'll Learn
- Tell hard, partial and routing blockages apart
- Create a placement blockage in OpenROAD
- Explain how a blockage changes the effective utilization
- Know when blockages are used in real designs
Kinds of Blockages
- Hard placement blockage: no standard cell may be placed in the region. Wires may still pass over it.
- Partial placement blockage: cells may be placed, but only up to a maximum density, for example 30 % of the area.
- Soft blockage (in some tools): blocks the initial placement but allows later timing fixes to put buffers there.
- Routing blockage (obstruction): no wires on certain layers in the region, for example above a sensitive analog block.
Halos around macros, covered in Macro Placement, are placement blockages tied to a macro.
Creating a Blockage in OpenROAD
OpenROAD creates blockages through its database API. A 55 x 55 um hard blockage in the middle of the multiplier's core, at (60, 60) to (115, 115) um:
set block [ord::get_db_block] set b [odb::dbBlockage_create $block 60000 60000 115000 115000]
Coordinates are in database units (nanometres). For a partial blockage, set its maximum density:
$b setMaxDensity 30
The blockage must exist before global placement. In the lab's flow, where tap cells are inserted before the pins and the cells, the tap cells that land inside the blockage must also be removed; otherwise the final placement check fails with Placed in rows check failed. In DEF, the blockage appears in its own section:
BLOCKAGES 1 ;
- PLACEMENT + PARTIAL 30.000000 RECT ( 60000 60000 ) ( 115000 115000 ) ;
END BLOCKAGES
The Effect on the Multiplier
With the hard blockage, the placer leaves the square empty and moves the cells around it. Global placement treats the blocked area as occupied, so the effective utilization rises:
| Run | Utilization seen by global placement | Signal wire | Worst slack at 10 ns |
|---|---|---|---|
| no blockage | 44.4 % | 28.3 mm | +0.58 ns |
| hard blockage, 55 x 55 um | 51.2 % | 29.7 mm | +0.50 ns |
| partial blockage, 30 % | 48.9 % | 29.4 mm | +0.58 ns |
The hard blockage takes 3,025 um2, about 13 % of the core, and the wires get 5 % longer because some connections now go around it. The partial blockage counts as 70 % blocked. After global placement, 51 cells sit inside it, at the allowed density. In the OpenROAD version the lab uses, however, the detailed placer then moves every cell out of the region, so the final layout looks like the hard case. That is worth knowing: a tool feature can behave differently in each step of the flow, so always check the final result.
Quick Check
Q: A core of 20,000 um2 holds 9,000 um2 of cells. A 2,000 um2 hard blockage is added. What utilization does the placer now have to reach?
Show Answer
9,000 / (20,000 - 2,000) = 50 %, up from 45 %. A blockage removes area from the core without removing any cells.
When Blockages Are Used
- Around macros: halos keep cells away from macro edges and pin areas.
- In channels: a narrow strip between two macros is often fully blocked, because cells placed there are hard to reach and slow everything around them.
- For routing room: partial blockages where many wires must pass, such as near a congested macro corner.
- For later fixes: soft or partial blockages keep space free for buffers inserted during timing closure or ECOs.
- Around sensitive circuits: routing blockages keep noisy digital wires off analog blocks.
Quick Check
Q: Why would a designer block a 5 um gap between two macros completely, instead of letting cells fill it?
Show Answer
Cells in a narrow gap between macros are surrounded by blocked area: their wires must squeeze through the gap, and they are far from the rest of the logic. They cause congestion and long wires. Blocking the gap keeps cells in the open core.
Running It in ChipVerify Lab
The lab's PnR panel has no blockage setting. With PRO, the blockage lines can be added to the OpenROAD script after the tap cells, together with the loop that removes the tap cells inside the blockage. Without PRO, run the multiplier unchanged and look at where the cells cluster: that is the area a blockage would push them out of.
Common Mistakes
Mistake #1: Adding a blockage without resizing the core
A blockage raises the effective utilization. A design that was comfortable at 60 % can become hard to place and route at 70 %.
Mistake #2: Expecting a blockage to stop routing
A placement blockage only keeps cells out; wires still cross it. Keeping wires out needs a routing blockage on the layers concerned.
Practice Exercise
Challenge: Size a Blockage
The multiplier's core is 155.0 x 152.3 um with 10,320 um2 of placed cells. How large a square hard blockage can be added before the effective utilization reaches 60 %? Run Place and Route on the multiplier without a blockage and note where the cells go.
Hint
At 60 %, the free core area must be 10,320 / 0.6.
Solution
The core is 23,613 um2. At 60 % the cells need 10,320 / 0.6 = 17,200 um2, so the blockage can take about 6,400 um2, a square of about 80 x 80 um. A real design would stay well below that, because the clock tree, timing repair and routing all need room too.
Open the ready-made example in the lab, synthesize it and run Place and Route.
Summary
- Hard placement blockages keep cells out, partial ones limit the density, routing blockages keep wires out.
- In OpenROAD a blockage is created with
odb::dbBlockage_create, plussetMaxDensityfor a partial one. - A blockage raises the effective utilization: 44.4 % to 51.2 % for a 55 x 55 um blockage in the multiplier.
- Blockages are used around macros, in channels, for routing room, for later fixes and around sensitive circuits.