Clock Uncertainty

A clock edge is never perfectly steady. It can arrive a little early or a little late, and the clock tree is not known exactly before it is built. Clock uncertainty is the margin that STA keeps for this. It is one number in the constraints, and it reduces the slack of every check on the clock. This article explains where the margin comes from, how it enters the setup and hold equations, and how to set it separately for setup, for hold and between two clocks.

7 min read | Intermediate

What You'll Learn

• Name the reasons for clock uncertainty and say what jitter is
• Apply uncertainty to the setup and the hold equation
• Set uncertainty for setup only, for hold only and between two clocks
• Choose a sensible uncertainty at different stages of the design flow

Where the Margin Comes From

The time between two clock edges is not exactly the period. Jitter is the small, random change in the time of each edge. The clock source, such as a PLL, makes edges that move a little from cycle to cycle, and noise on the supply moves them further. STA analyzes a fixed time, so it keeps a margin for these effects.

Uncertainty has a second use. Before the clock tree is built, STA uses ideal clocks and does not know the skew that the tree will have. Designers then add an uncertainty that covers the skew they expect. After the clock tree is built, the real skew is in the report, and the uncertainty can shrink to cover only the jitter and some safety margin.

How It Enters the Equations

Uncertainty makes both checks harder, but in different ways. For setup, the capture edge is assumed to come early, so the time available shrinks. For hold, the capture edge is assumed to come late, so the old data must stay stable for longer:

Setup: Data required time = Tcapture + Tperiod - Tsetup - Tuncertainty
Hold:  Data required time = Tcapture + Thold + Tuncertainty

With a single value, set_clock_uncertainty 0.5 [get_clocks clk], the demo path from _7_ to _6_ has this result:

The setup slack loses 0.5 ns and the hold slack loses 0.5 ns. The hold check becomes a violation of -0.0759 ns, and it stays a violation at any clock period, because the period is not in the hold equation. This is a reason to be careful with large uncertainties: a number that is too large makes hold violations that do not exist, and costs area to fix.

Setup and Hold Separately

The two checks often need different margins. Jitter often matters more for setup, because the setup check depends on the time between two different edges, while hold looks at one edge only. You can set them separately with the options -setup and -hold:

set_clock_uncertainty -setup 0.2 [get_clocks clk]
set_clock_uncertainty -hold  0.1 [get_clocks clk]

For the demo path, the setup slack becomes 1.4502 - 0.2 = 1.2502 ns, and the hold slack becomes 0.4241 - 0.1 = 0.3241 ns. The report adds a row clock uncertainty to the capture clock path, with a negative number for setup and a positive number for hold:

   2.0000    2.0000   clock clk (rise edge)
   0.0000    2.0000   clock network delay (ideal)
  -0.2000    1.8000   clock uncertainty
   0.0000    1.8000   clock reconvergence pessimism
             1.8000 ^ _6_/CLK (sky130_fd_sc_hd__dfxtp_1)
  -0.1174    1.6826   library setup time
             1.6826   data required time

Uncertainty Between Two Clocks

Paths that cross from one clock to another often need more margin, because two different clocks do not share jitter. Use -from and -to:

set_clock_uncertainty 0.1 -from [get_clocks clk_div] -to [get_clocks clk] -setup

The row in the report is called inter-clock uncertainty. For the divider design of the article about generated clocks, the setup slack of the path from the slow clock to the fast clock changed from 1.6200 ns to 1.5200 ns. The setting without -from and -to is called simple uncertainty and applies to the checks within one clock.

Choosing a Value

There is no single right number, but typical practice is:

• Early, with ideal clocks: a larger value that includes the expected skew of the clock tree, plus the jitter.
• After the clock tree is built and with propagated clocks: a smaller value that covers only the jitter and the margin.
• At sign-off: the value that was agreed with the team, based on the clock source and the technology.

Never use uncertainty to hide a problem. A value that is large enough to make a violation disappear is the wrong tool.

Common Mistakes

set_clock_uncertainty 0.5 [get_clocks clk]