The library corners describe the cells. The wires have their own variation: the metal can come out a little thicker or thinner, the dielectric between the layers can vary, and each change moves the resistance and the capacitance of the wires. The extraction tool therefore writes the parasitics for several RC corners, with names such as Cbest, Cworst, RCbest and RCworst. This article explains what they mean, shows their effect on one path with real numbers, and says which corner goes with which check.
8 min read | Intermediate
What You'll Learn
- Define the four RC corners and say what each one varies
- Explain which RC corner is worst for setup and which one for hold
- Read the effect of an RC corner on a wire capacitance and on a slack
- Pair a library corner with an RC corner for sign-off
Why Wires Vary
A wire in a chip is a strip of metal with an insulator around it. Its resistance depends on the cross section of the strip, and its capacitance depends on its distance to the neighbours and to the layers above and below. In manufacturing, these dimensions vary a little. A wire that is wider is less resistive, and it also has more area facing the neighbours and more capacitance. A wire that is thinner is more resistive and has less capacitance. The resistance and the capacitance do not vary independently: they move in opposite directions, because the same width change that lowers the resistance raises the capacitance.
The Four Corners
The extraction is run for the extremes of these variations, and each result is a separate SPEF file:
- Cbest: the lowest total capacitance. The resistance is higher than the typical one.
- Cworst: the highest total capacitance. The resistance is lower than the typical one.
- RCbest: the smallest product of R and C. The resistance is the lowest, and the capacitance is higher than the typical one.
- RCworst: the largest product of R and C. The resistance is the highest, and the capacitance is lower than the typical one.
Because the resistance and the capacitance move in opposite directions, no single corner is the worst for every net. The delay of a short net is mostly set by its capacitance, so Cworst and Cbest are the extremes for short nets. The delay of a long net depends on the product of R and C, as in the Elmore delay, so RCworst and RCbest are the extremes for long nets. For a net of average length, the typical corner can even be the extreme. This is why a sign-off uses several of them.
Effect on One Path
To see the direction of the effect, the net r1 of the demo circuit from the article about SPEF was scaled by hand by 20 percent: in capacitance only, or in capacitance and resistance together. Its typical wire capacitance is 0.0090 pF. Real corner files move R and C in opposite directions, as described above, so these cases stand in for the corners and show how the slack reacts. They are not the values of a real technology. These are the results for the path from _7_ to _6_, which goes through that net:
| Scaled case | C | R | Wire cap (pF) | Setup slack (ns) | Hold slack (ns) |
|---|---|---|---|---|---|
| C low | -20% | typical | 0.0072 | 1.3938 | 0.4976 |
| C and R low | -20% | -20% | 0.0072 | 1.3969 | 0.4955 |
| typical | typical | typical | 0.0090 | 1.3822 | 0.5129 |
| C high | +20% | typical | 0.0108 | 1.3705 | 0.5283 |
| C and R high | +20% | +20% | 0.0108 | 1.3660 | 0.5310 |
The setup slack is the smallest in the case with the slowest wires, 1.3660 ns, and the largest in the case with the fastest wires, 1.3969 ns. The hold slack goes the other way: it is the smallest where the wires are fast and the data arrives early, 0.4955 ns, and the largest where they are slow, 0.5310 ns. So the slowest wires are the worst for setup and the fastest wires are the worst for hold. The spread is small here, about 0.03 ns for setup, because the demo has short wires. In a real design, with long wires, it can be much larger.
Pairing Library and RC Corners
A sign-off scenario combines a library corner with an RC corner. The usual pairs are:
| Check | Library corner | RC corner |
|---|---|---|
| Setup | slow (ss) | RCworst or Cworst |
| Hold | fast (ff) | RCbest or Cbest |
Both RCworst and Cworst are used for setup, because they are worst for different nets. A short net, where the capacitance sets the delay, has its worst case in Cworst. A long net, where the resistance of the wire matters, has its worst case in RCworst. Running both covers both kinds. The tool then reports the worst slack of the scenarios, as for the library corners.
Reading a SPEF for a corner works with read_spef. The lab does not read parasitic files, so these numbers come from runs outside of the lab with hand-scaled files.
Common Mistakes
Mistake #1: Pairing the slow library with the best RC corner
The setup check at the slow library uses the worst wires, not the best ones. A mixed pair makes the analysis optimistic and does not cover any real condition well.
Mistake #2: Using only RCworst for setup
Paths with short nets are worse in Cworst. Run both, and look at the worst slack of the two.
Quick Check: Which RC corner gives the smallest hold slack for a path with long wires, and why?
RCbest, because the wires are the fastest, so the data arrives the earliest.
Practice Exercise
Challenge: Scale the Net by Hand
This is a pencil and paper exercise. In the typical case, the wire capacitance of the net r1 is 0.0090 pF and the setup slack of the path is 1.3822 ns. In the case with the capacitance +20 percent, the slack is 1.3705 ns. Calculate the wire capacitance in Cworst and the change of the slack. Then say by how many picoseconds the setup slack changes for each 0.001 pF of wire capacitance.
Hint
20 percent of 0.0090 pF is 0.0018 pF. The change of the slack is the difference of the two slacks.
Solution
The capacitance in that case is 0.0090 + 0.0018 = 0.0108 pF. The slack changes by 1.3822 - 1.3705 = 0.0117 ns, which is 11.7 ps, for 0.0018 pF of extra capacitance. That is about 6.5 ps for each 0.001 pF in this path. The effect is linear to a good approximation for small changes.
Summary
- Wires vary in manufacturing, so the extraction is run at several RC corners.
- Cbest and Cworst have the lowest and the highest capacitance. RCbest and RCworst have the smallest and the largest product of R and C. In every corner, the resistance moves opposite to the capacitance.
- Setup slack is the smallest in the RCworst or Cworst corner, and hold slack is the smallest in the RCbest or Cbest corner.
- On the demo path, the setup slack changes from 1.3969 ns (RCbest) to 1.3660 ns (RCworst), and the hold slack from 0.4955 ns to 0.5310 ns.
- A sign-off scenario pairs the slow library with worst wires for setup, and the fast library with best wires for hold.
- Run both a C corner and an RC corner: C corners are the extremes for short nets and RC corners for long nets.
