Every line of a timing report comes down to one number: slack. Slack is the spare time. Imagine a train that arrives at the station at 8:50, when the connecting train leaves at 9:00. The spare time is 10 minutes. In a chip, the signal is the first train, the clock edge is the departure of the second one, and the spare time is the slack. STA finds the arrival time by walking forward through the design from where signals start, and the required time by walking backward from where they must be caught.
7 min read | Intermediate
What You'll Learn
- Compute arrival times by propagating delays forward through a path
- Compute required times by propagating backward from the endpoint
- Calculate setup and hold slack and interpret positive, zero and negative values
- Read the worst negative slack (WNS) and total negative slack (TNS) of a design
Arrival Time: Walking Forward
The arrival time at a pin is the time at which a signal transition reaches it, measured from the reference clock edge. STA starts at the startpoints and adds delays as it moves along the arcs:
- At an input port, the arrival time is the clock edge time plus the input delay you constrained.
- At the clock pin of a flip-flop, it is the time the clock edge reaches the pin. The clock-to-Q arc then adds the launch delay.
- At every other pin, it is the arrival time at the previous pin plus the delay of the arc between them.
When several paths merge at a pin, STA keeps the largest arrival time for a setup check, because the latest signal is the dangerous one. For a hold check it keeps the smallest. Rising and falling transitions have separate arrival times.
Required Time: Walking Backward
The required time is the latest time at which a signal may arrive at a pin and still meet the check. It starts at the endpoint:
- At the data pin of a capture flip-flop, the setup required time is the arrival time of the next capture clock edge minus the library setup time of the flip-flop.
- At an output port, it is the capture clock edge time minus the output delay you constrained.
STA then moves backward and subtracts the delay of each arc. At a pin that drives several paths, it keeps the smallest required time, because that is the most demanding one. The picture below follows one path from input c through the XOR gate to the data pin of r2, with the clock period at 2.0 ns.
The arrival time starts at 0.4000, the input delay, and grows by the 0.1176 ns delay of the XOR gate to 0.5176. The required time starts at the endpoint, 2.0000 - 0.1174 = 1.8826, and shrinks as it moves back to 1.7650 at the input.
Slack
Slack is the difference between the two: the time the signal is needed minus the time it arrives. For the hold check the sign is the other way round, so that a positive slack always means good news:
Setup slack = required time - arrival time Hold slack = arrival time - required time
For the path above, the setup slack is 1.8826 - 0.5176 = 1.3650 ns. It is the same at every pin along the path, as the picture shows, because moving a pin along a path adds the same delay to the arrival time and takes it from the required time.
Slack of zero or more means the check is met. Negative slack means a violation. A slack of exactly zero is met, with no margin left.
Shrinking the clock period to 0.5 ns does not change the arrival time. It moves the required time earlier, from 1.8826 to 0.3826, and the slack turns negative at -0.1350 ns.
Several Paths Into One Endpoint
Where paths converge, the pin takes the worst slack of all the paths through it. The data pin of r2 is reached from two startpoints, and each path has an earliest and a latest arrival.
The latest arrival (0.5176 ns, from c) feeds the setup check and the earliest arrival (0.3657 ns, from r1) feeds the hold check. One endpoint can therefore have different critical paths for setup and for hold.
WNS and TNS
Designs have thousands of endpoints, so reports summarize the situation with two numbers:
- WNS, worst negative slack: the most negative slack in the design. It tells you how far the worst path misses.
- TNS, total negative slack: the sum of the negative slack over all violating endpoints. It tells you how much work is left.
At a 0.5 ns period, the four endpoints of the demo design have a setup slack of -0.4674, -0.2956, -0.1361 and -0.1350 ns. The WNS is -0.4674 and the TNS is the sum, -1.0341. The report prints the worst slack for both check types:
worst slack max -0.47 worst slack min 0.42
Here max is the setup check and min is the hold check. The setup check fails while the hold check still has 0.42 ns of margin.
Common Mistakes
Mistake #1: Using the setup formula for hold
Setup slack is required minus arrival, hold slack is arrival minus required. Swap them and a hold violation looks like a pass, because the sign is wrong. Positive is always good in a report, whatever the check.
Mistake #2: Reading a slack of 0.00 as a failing path
The summary lines round to two digits. At a 0.9675 ns period the summary prints a worst slack of 0.00, but the path report shows 0.0001 and MET. Check the full report before deciding.
Quick Check: With a 2.0 ns period and a flip-flop setup time of 0.1174 ns, what is the setup required time at its data pin?
2.0000 - 0.1174 = 1.8826 ns, assuming an ideal clock with no latency and no uncertainty.
Practice Exercise
Challenge: Predict the Minimum Clock Period
Use the sta_demo constraints with a 2.0 ns period and 0.4 ns input and output delays. From the arrival times in the 2.0 ns report alone, predict the smallest period at which no setup check fails. Then test your prediction by running STA at a period just above and just below it.
Open the ready-made example in the lab, run synthesis, and then run STA. Editing constraints.sdc and re-running only STA, and choosing another library or corner, are PRO features.
Hint
Each endpoint fails when the period drops below its arrival time plus whatever is subtracted at the endpoint: the setup time for a flip-flop, the output delay for an output port. The period has to satisfy all of them.
Solution
The minimum period for each endpoint is its arrival time plus its subtraction: 0.5176 + 0.1174 = 0.6350 for r2, 0.5201 + 0.1160 = 0.6361 for r1, 0.3956 + 0.4 = 0.7956 for y and 0.5674 + 0.4 = 0.9674 for z. The period must be at least the largest of them, 0.9674 ns, set by the path from a straight to z. At 0.97 ns the slack of z is +0.0026 (met), and at 0.96 ns it is -0.0074 (violated). The slowest flip-flop path is not the one that limits the clock. The input and output delays are.
Summary
- Arrival time is computed forward from the startpoints by adding delays, keeping the latest value for setup and the earliest for hold.
- Required time is computed backward from the endpoints by subtracting delays, keeping the most demanding value.
- Setup slack is required minus arrival, and hold slack is arrival minus required. Zero or positive is met.
- Slack is the same at every pin of a single path, and a pin where paths converge takes the worst.
- An endpoint can have different worst paths for setup and for hold.
- WNS is the most negative slack and TNS is the sum of all negative endpoint slacks.