The full adder adds three bits: A, B and a carry-in from the column below. It produces a sum bit and a carry-out for the column above. Chain n of them and you have an n-bit adder, the core of every ALU and address generator. Its two equations are short, but they carry the ideas of carry generation, ripple delay, subtraction and overflow.
15 min read | Intermediate Level
What You'll Learn
- The full-adder truth table and its sum (3-input XOR) and carry-out (majority) outputs
- How it is built from two half-adders and how carries generate and propagate
- How a ripple-carry adder works, why it is slow, and how it also subtracts and detects overflow
- Why the sum needs one extra bit, and how carry-out differs from overflow
Quick Answer: Full-Adder
| A | B | Cin | S | Cout | Arithmetic |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 0 + 0 + 0 = 0 |
| 0 | 0 | 1 | 1 | 0 | 0 + 0 + 1 = 1 |
| 0 | 1 | 0 | 1 | 0 | 0 + 1 + 0 = 1 |
| 0 | 1 | 1 | 0 | 1 | 0 + 1 + 1 = 2 |
| 1 | 0 | 0 | 1 | 0 | 1 + 0 + 0 = 1 |
| 1 | 0 | 1 | 0 | 1 | 1 + 0 + 1 = 2 |
| 1 | 1 | 0 | 0 | 1 | 1 + 1 + 0 = 2 |
| 1 | 1 | 1 | 1 | 1 | 1 + 1 + 1 = 3 |
S = A xor B xor Cin (1 for an odd number of ones) Cout = A.B + A.Cin + B.Cin (1 for two or more ones: the majority function)
Building the Full Adder
Add A and B with one half-adder to get a partial sum P = A xor B and a partial carry G = A.B. Add the carry-in to P with a second half-adder. A carry leaves the pair if either half-adder produced one, so an OR gate merges them:
P = A xor B (half-adder 1, sum) G = A . B (half-adder 1, carry) S = P xor Cin (half-adder 2, sum) Cout = G + P . Cin (OR of the two carries)
Generate and Propagate
The pair (G, P) says what a column does to a carry:
- Generate (G = A.B = 1): the column creates a carry whatever Cin is
- Propagate (P = A xor B = 1): the column passes an incoming carry to its output
- Kill (A = B = 0): the column outputs no carry
So Cout = G + P.Cin. Carry-lookahead adders compute G and P for all columns first and derive every carry in parallel, instead of waiting for carries to ripple.
CMOS adder cells factor the equations differently. Because S = ABC + (A + B + C).Cout' reuses the carry-out, a mirror adder needs 28 transistors, against 32 for a direct implementation.
Where Are Full Adders Used?
In every adder, subtractor, incrementer and comparator, and in multipliers, where full adders act as 3-to-2 compressors (three bits in, two out) that reduce the partial products. A multiply-accumulate array contains thousands of them.
The Ripple-Carry Adder
Connect each carry-out to the next carry-in and you have a ripple-carry adder. The least significant bit sits on the right and the carry ripples to the left:
Example: 0110 + 0111 (6 + 7) with carry-in 0:
| Column | A | B | Carry in | Sum | Carry out |
|---|---|---|---|---|---|
| bit 0 | 0 | 1 | 0 | 1 | 0 |
| bit 1 | 1 | 1 | 0 | 0 | 1 |
| bit 2 | 1 | 1 | 1 | 1 | 1 |
| bit 3 | 0 | 0 | 1 | 1 | 0 |
Reading the sums from bit 3 to bit 0 gives 1101 = 13, with no carry-out.
Ripple-carry delay proportions
one more bit -> one more carry stage on the critical path
t_adder = (n - 1) x t_carry + t_sum
illustrative t_carry = 40 ps, t_sum = 60 ps:
8 bits: 7 x 40 + 60 = 340 ps
32 bits: 31 x 40 + 60 = 1300 ps
Delay grows linearly with width, which is why wide adders use carry-lookahead or parallel-prefix structures (see Comparators & ALUs).
Quick Check
Q: What are S and Cout for A = 1, B = 1, Cin = 1?
Show Answer
Three ones add to 3 = binary 11, so S = 1 and Cout = 1. Check: S = 1 xor 1 xor 1 = 1, and Cout = G + P.Cin = 1 + 0 = 1.
Subtraction and Overflow With the Same Adder
Two's complement subtraction is A - B = A + (not B) + 1. An XOR gate on each B input, controlled by SUB, inverts B, and SUB also feeds the carry-in:
B_eff = B xor {SUB, SUB, SUB, SUB} (inverts B when SUB = 1)
Sum = A + B_eff + SUB (the +1 enters as the carry-in)
Signed overflow is detected by comparing the carry into the top column with the carry out of it: V = Cn-1 xor Cn, where Cn is the carry-out of the top bit.
| 4-bit operands | Signed value | Result | C3 | C4 | V |
|---|---|---|---|---|---|
| 0111 + 0001 | 7 + 1 | 1000 (-8) | 1 | 0 | 1 |
| 0101 + 0011 | 5 + 3 | 1000 (-8) | 1 | 0 | 1 |
| 1000 + 1111 | -8 + -1 | 0111 (7) | 0 | 1 | 1 |
7 + 1 gives 1000, which is -8 as a signed number: the carry into the top bit is 1 but nothing carries out, so V = 1. The same happens for 5 + 3. In the last row, -8 + -1 = -9 does not fit either, and C3 and C4 differ again.
Unsigned overflow is simply the carry-out Cn. For 1111 + 0001, C4 = 1 but V = 0, because -1 + 1 = 0 is fine in signed arithmetic.
Quick Check
Q: Add the signed 4-bit numbers 0110 (6) and 0101 (5). What is the result and is V set?
Show Answer
The sum is 1011, which is -5 as a signed number. The carry into the top bit is 1 and the carry out is 0, so V = 1: 6 + 5 = 11 does not fit in 4 signed bits.
The overflow rule is often stated as "both operands have the same sign but the result has the other sign", which equals Cn-1 xor Cn.
Wide adders are rarely plain ripple chains: when timing demands it, carry-lookahead or parallel-prefix logic produces the carries much faster than rippling them.
Where Is Overflow Detection Used?
Processor flag registers (carry, overflow, zero, negative) are generated by the ALU adder and used by branch instructions, and saturating arithmetic in signal-processing units clamps the result when the overflow flag is set.
Common Mistakes
Mistake #1: Losing the carry-out
Wrong: Keeping only the four sum bits of a 4-bit addition
Right: Keep the carry-out as a fifth bit of the result.
Why? The sum of two 4-bit numbers can need five bits, so the four sum bits alone throw the carry away.
Mistake #2: Confusing carry-out with signed overflow
Wrong: Branching on the carry flag after a signed addition
Right: Use V = Cn-1 xor Cn for signed results and the carry-out for unsigned results.
Why? The same operation can set one flag and not the other, so signed and unsigned comparisons use different flags.
Mistake #3: Forgetting the +1 when subtracting
Wrong: Inverting B but leaving the carry-in at 0
Right: Drive the carry-in with SUB.
Why? Inverting B gives the one's complement. The extra 1 completes the two's complement, otherwise every difference is off by one.
Practice Exercise
Challenge: Add and Subtract With the Same Adder
Use the 4-bit ripple-carry adder.
- Compute 1011 + 0110 with carry-in 1, column by column, and give the sum and carry-out.
- Compute 5 - 3 with the adder/subtractor (A = 0101, B = 0011, SUB = 1): B_eff, sum and carry-out.
- Does the subtraction overflow as a signed number?
Hint
Write the carries under the columns, starting from the right with the carry-in.
Solution
1. bit 0: 1 + 0 + 1 = 2 -> S0 = 0, C1 = 1 bit 1: 1 + 1 + 1 = 3 -> S1 = 1, C2 = 1 bit 2: 0 + 1 + 1 = 2 -> S2 = 0, C3 = 1 bit 3: 1 + 0 + 1 = 2 -> S3 = 0, C4 = 1 Sum = 0010, carry-out = 1 (11 + 6 + 1 = 18 = 1_0010). 2. B_eff = 1100, carry-in = 1: 0101 + 1100 + 1 = 1_0010. Result 0010 = 2, carry-out = 1 (in a subtraction, carry-out 1 means "no borrow"). 3. No. C3 = 1 and C4 = 1, so V = 0.
Summary
In this tutorial, you learned:
- A full adder adds A, B and a carry-in: S = A xor B xor Cin and Cout = AB + ACin + BCin
- It is two half-adders and an OR; in generate/propagate form Cout = G + P.Cin
- A ripple-carry adder chains full adders, its delay grows linearly with width, and XOR gates plus Cin = SUB turn it into a subtractor
- Signed overflow is Cn-1 xor Cn; the sum of two n-bit numbers needs n + 1 bits to keep the carry
