The Post-Silicon Timeline: First Silicon to Production Release

Post-silicon validation runs on a fixed clock: it starts when the first chips arrive from the fab and ends with the decision to start mass production. In between, the chip goes through bring-up, broad validation, one or more silicon revisions, characterization and qualification, and early samples go out to customers. This article walks through that timeline, explains the names companies use for silicon revisions and samples, and describes the production release decision that everything leads up to.

7 min read | Beginner

What You'll Learn

• Outline the phases from tapeout to production release
• Explain silicon revisions, or steppings, and how they are named
• Describe what samples go to customers and when
• List what the production release decision is based on

From Tapeout to the Lab

After tapeout, the foundry makes masks and processes wafers, a cycle of weeks to months described in the Physical Design tutorial's chapter on fabrication, for example Wafers, Cleanrooms and Lithography. The first wafers are probed, diced and packaged, often on an expedited path, and a first batch of chips is shipped to the validation lab.

Some teams also receive bare dies or wafers for early probing. The team uses this waiting time to finish preparing: boards, test content, debug software and a rehearsal of bring-up on an emulator or FPGA prototype.

The Phases

Power-on and bring-up

The first goal is a chip that powers on, runs its clocks, comes out of reset and responds to a debugger. This is a highly complex activity.

If the chip does not power on, the on-chip debug features are not available either, so visibility is very limited. Teams start from a bare configuration with complex features such as power management, security and the normal boot flow turned off. Obtaining a stable power-on recipe typically takes from a few days to a week after the silicon arrives, and re-enabling the complex features one by one can take several weeks.

Broad validation

Once the chip is stable, the main work runs in parallel: functional validation with tests and real software, compatibility validation with operating systems and peripherals, electrical validation of I/O, power and clocks, and speed-path work to find what limits the frequency. Every failure goes to debug.

Revisions

Bugs that cannot be lived with, and improvements found along the way, are collected into the next silicon revision. Some can be fixed by changing only the metal layers, which is faster and cheaper than a full revision, as the Physical Design article First Silicon and Respins explains. The new revision goes through a shorter validation focused on the fixes and on anything they might have broken.

Characterization and qualification

On the revision intended for production, many parts are measured across voltage, frequency and temperature to set the specifications and speed grades, and reliability qualification shows that the parts will last. Both need parts from the final revision, so they cannot finish before it exists.

Names for Revisions and Samples

Companies name silicon revisions, often called steppings, with a letter and a number. A common convention, also described in the Physical Design tutorial, uses the letter for the base layers and the number for the metal layers: A0 is the first silicon, A1 a metal-only fix, B0 a revision that changed the base layers. A chip may ship as B1, which tells experienced engineers that it took one full revision and one metal fix.

Samples sent to customers before production are also staged. Many companies distinguish early engineering samples, which may have known bugs and limited specifications, from later qualification samples built from the production revision. Customers use them to bring up their own boards and software, which often finds problems the chip team's validation did not, because customers use the chip in ways nobody anticipated.

The Production Release Decision

The end point is the decision to start mass production, often called the product release qualification, or PRQ, decision. It is based on:

• The trend and type of bugs found during post-silicon validation: are new bugs still appearing, and are the open ones acceptable with workarounds?
• Power and performance results: does the product meet its targets?
• Tolerance to noise margins and electrical variation across process corners and many parts. Production release typically requires the average defect level to be below about 50 parts per million.

The decision also depends on reliability qualification being complete and on manufacturing test being ready. Because the launch date is set far ahead, often years, by market forecasts, post-silicon validation must deliver its results within the fixed time between first silicon and this decision.

After Release

Validation does not stop at release. On-field debug, sometimes called survivability, means finding and mitigating problems in deployed products, usually with software or firmware updates, which is only possible if the chip has enough configurability to patch.

Field returns, parts that fail in customers' hands, are analysed to learn whether a design weakness, a manufacturing problem or misuse caused them. Both are covered in the last chapters of this tutorial.

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