When a bug needs a silicon fix, there are two ways to make one. A metal fix changes only some of the upper metal layers, reusing spare cells already placed on the die, and needs only a few new masks. A full respin, or base-layer change, can change anything, but needs a full mask set and a full trip through the fab.

This article explains how each works, what each costs in time and money, and how teams decide which to use.

7 min read | Intermediate

What You'll Learn

  • Explain how spare cells make metal-only fixes possible
  • Compare the time and cost of a metal fix and a full respin
  • Decide which fix suits a set of bugs
  • Read stepping names that reflect the kind of change

What Changes

The layer stack of a chip: transistor and base layers at the bottom, then lower metal layers and upper metal layers; a full respin changes masks at every level, while a metal fix changes only a few upper metal and via masks

A chip is built from dozens of mask layers. The bottom layers make the transistors; the layers above make the wires. Changing transistors needs new masks for the base layers and everything above them that depends on them, in practice a new full set.

A metal fix leaves the transistors exactly as they are and changes only the wiring in some metal and via layers. Wafers can even be held in the fab after the transistor layers, waiting for the new metal masks, which saves weeks.

Spare Cells

Spare cells: unused gates and flip-flops scattered across the die with their inputs tied off; a metal fix rewires one spare gate into a failing path, changing the logic without touching the transistor layers

A metal fix can only use transistors that already exist. Designs therefore scatter spare cells across the die: unused gates, flip-flops and buffers with their inputs tied off. Some designs also use configurable gate-array cells that metal can turn into different functions.

A logic fix rewires nearby spare cells into the failing logic. A timing fix might resize a path by using a stronger spare buffer. If no suitable spare cell is close enough, the fix may not be possible in metal.

Quick Check

Q: A fix needs one extra AND gate and one flip-flop in a block that has spare cells nearby. Can it be done in metal?

Show Answer

Probably yes: the spare gates and flip-flops can be wired in by changing metal layers. The fix still has to meet timing with the extra wire length, and it must be checked by simulation and equivalence checking before the masks are made.

Time and Cost

Illustrative timeline comparing a metal fix, a few new masks with wafers held after the base layers so new parts arrive in a few weeks, with a full respin, a full mask set and a complete fab cycle taking a few months

A metal fix needs only a few masks and, with held wafers, can return new silicon in a few weeks. A full respin needs every mask and a complete fab cycle, often a few months, and the mask set for an advanced process costs far more.

Stepping names often show the difference. A common scheme changes the number for metal fixes and the letter for base-layer changes: A0 is first silicon, A1 a metal fix of it, B0 a full respin.

Making the Call

Teams decide by looking at all open bugs together:

  • Can every must-fix bug be fixed in metal? If one needs new transistors, a base-layer change is required anyway.
  • Schedule: a metal fix may meet a customer date that a respin would miss.
  • Other improvements: a respin can also fix speedpaths, leakage, yield problems and add features.
  • Risk: every change can introduce new bugs; small metal changes are easier to verify.

A common pattern is a metal fix for urgent bugs, followed by a full respin that gathers everything else.

Quick Check

Q: Ten bugs are open. Nine can be fixed in metal; one needs a new transistor-level circuit in an analog block.

The product must ship in two months. What is a sensible plan?

Show Answer

A metal stepping for the nine bugs to meet the date, with a workaround or erratum for the analog one if acceptable. The analog fix, along with speedpath and yield improvements, goes into a later base-layer stepping.

In Practice

Every silicon fix starts as an engineering change to the design, checked by simulation, formal equivalence against the intended change, and timing analysis, as any tapeout would be. The new stepping then goes through Validating a New Stepping before it replaces the old one.

Common Mistakes

Mistake #1: Too few spare cells

Without spare cells near a bug, a metal fix is impossible. Plan them in every block.

Mistake #2: Deciding bug by bug

Look at all open bugs together; one base-layer bug changes the plan for all.

Mistake #3: Treating a metal fix as low risk by default

Verify every change as carefully as the original design.

Practice Exercise

Challenge: Compare the Options

Assume a metal fix costs 1 unit of mask cost and delivers parts in 5 weeks, and a full respin costs 8 units and takes 14 weeks. Each week of delay costs 0.5 units in lost sales.

Four urgent bugs are metal-fixable. Which is cheaper overall for those bugs, and by how much? The numbers are assumptions for the exercise.

Hint

Total = mask cost + weeks x 0.5.

Solution

Metal fix: 1 + 5 x 0.5 = 3.5 units. Full respin: 8 + 14 x 0.5 = 15 units. The metal fix is cheaper by 11.5 units, so it is the right choice for the urgent bugs, with a respin later only if it brings enough other value.

Summary

  • A metal fix changes only some metal and via layers, using spare cells already on the die.
  • A full respin can change transistors but needs every mask and a full fab cycle.
  • Metal fixes take weeks; respins take months and cost far more.
  • The decision looks at all open bugs, schedule, extra improvements and risk.
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