A new stepping is a revised version of the chip, made to fix bugs, improve speed or yield, or add features. Before it replaces the old stepping, validation must show three things: the intended fixes work, nothing that worked before is broken, and the electrical behaviour is still within specification. This article describes how teams plan and run that validation, and how they focus effort on what actually changed.

6 min read | Intermediate

What You'll Learn

  • List the three goals of stepping validation
  • Plan validation based on what changed
  • Use regression suites and bug tests effectively
  • Decide when a stepping is ready to replace the old one

Three Goals

Three goals of validating a new stepping: confirm each intended fix by rerunning the tests that exposed the bugs and checking workarounds can be removed; check for regressions with the full regression suite; and re-characterize electrical behaviour such as Fmax, power and I/O margins
  1. Confirm the fixes: rerun the tests that exposed each bug, with workarounds removed, and check they now pass.
  2. Check for regressions: run the regression suite to make sure nothing else broke.
  3. Re-characterize: measure Fmax, power, minimum voltage and I/O margins again, since even metal changes can shift timing and loading.

Focusing on What Changed

A stepping is not first silicon. Much of the design is identical, and full validation from scratch would waste months. Teams start from the list of changes, the engineering change orders, and plan around them.

Risk-based stepping plan: changed blocks get deep testing, focused random tests and electrical checks; blocks connected to changed blocks get targeted interface testing; unchanged blocks get the standard regression suite only
  • Changed blocks get deep testing: the original bug tests, new focused tests around each fix, and long random runs.
  • Neighbouring blocks that connect to changed logic get targeted interface testing.
  • Unchanged blocks get the standard regression suite.

A metal fix can still affect timing anywhere the changed wires run, so speedpath and shmoo checks cover the whole chip, not only the changed blocks.

Quick Check

Q: A metal stepping fixes one bug in the memory controller. Why run shmoos on the whole chip?

Show Answer

New metal routes can add capacitance and coupling to nearby paths in other blocks, and changes to shared structures such as clocks or power can have wide effects. A whole-chip shmoo catches any new speedpath or margin loss.

Regression Suites

Each previous bug leaves behind a test that exposed it. These tests, together with compliance tests, key software and exerciser seeds that found problems, form the regression suite.

The suite is run on every new stepping, and on every new firmware release. A failure that reappears is called a regression and blocks the stepping until it is understood.

Illustrative comparison of two steppings: errata count falls from the first to the second stepping, Fmax at the same voltage rises slightly after speedpath fixes, and the number of workarounds needed in firmware falls

Quick Check

Q: A bug test passes on the new stepping, but only with the old workaround still enabled. Has the fix been confirmed?

Show Answer

No. The workaround may be hiding the bug, as it did on the old stepping. The test must pass with the workaround removed to show the silicon fix works.

In Practice

A stepping is released for production when the fixes are confirmed, the regression suite passes, electrical characterization meets the specification, and reliability qualification for the change is complete, as in Reliability Qualification. The errata document is updated with the new stepping's status for every entry, and firmware is updated to skip workarounds that are no longer needed.

Common Mistakes

Mistake #1: Confirming fixes with workarounds still on

Remove the workaround when testing the fix.

Mistake #2: Testing only the changed block

Run the full regression suite and whole-chip electrical checks.

Mistake #3: Full first-silicon validation on every stepping

Focus effort on what changed and use a risk-based plan.

Practice Exercise

Challenge: Plan a Stepping

Stepping A1 fixes three bugs: one in the PCIe controller, one in the L2 cache, and a speedpath in the integer unit. List what to run on A1 before release.

Hint

Fixes, regressions, electrical.

Solution

Confirm each fix: PCIe and cache bug tests with workarounds removed, plus focused and random tests around each change, and PCIe compliance tests. Check regressions with the full suite and key software.

Re-characterize: whole-chip shmoos and Fmax to confirm the speedpath gain and catch new paths, plus power and I/O margins. Update errata and firmware.

Summary

  • Stepping validation confirms fixes, checks for regressions and re-characterizes electrical behaviour.
  • Plans focus on changed and neighbouring blocks, with standard regression elsewhere.
  • Bug tests must pass with workarounds removed.
  • Errata and firmware are updated when the stepping is released.
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