SystemVerilog Random

SystemVerilog makes a class property randomizable with one of two qualifiers: rand or randc. Both apply the same way to plain variables, arrays, queues, and dynamic arrays — see SystemVerilog Array Randomization in Class for constraining array and queue sizes. The difference covered here is entirely in how repeated values are handled.

6 min read | Intermediate Level

What You'll Learn

• How rand distributes values uniformly across its range, with repeats allowed
• How randc cycles through every legal value once before any value repeats
• Why randc properties are solved before other random variables
• The practical limits of using randc on wide variables

rand: Uniformly Distributed, Repeats Allowed

rand works the same whether the property is a scalar, a queue, or a dynamic array:

class Packet;
	rand int   		count;
	rand byte  		master [$];
	rand bit [7:0]  data [];

	...
endclass

Here's the simplest case — a single 3-bit scalar, randomized 10 times in a row. randomize() is called on the class object and randomizes every rand (and randc) property it finds inside that object:

class Packet;
	rand bit [2:0] data;
endclass

module tb;
	initial begin
		Packet pkt = new ();
		for (int i = 0 ; i < 10; i++) begin
			pkt.randomize ();
			$display ("itr=%0d data=0x%0h", i, pkt.data);
		end
	end
endmodule

Output

run -all;
# KERNEL: itr=0 data=0x7
# KERNEL: itr=1 data=0x2
# KERNEL: itr=2 data=0x2
# KERNEL: itr=3 data=0x1
# KERNEL: itr=4 data=0x2
# KERNEL: itr=5 data=0x4
# KERNEL: itr=6 data=0x0
# KERNEL: itr=7 data=0x1
# KERNEL: itr=8 data=0x5
# KERNEL: itr=9 data=0x0
# KERNEL: Simulation has finished. There are no more test vectors to simulate.

Notice that 0x2 and 0x1 each repeat multiple times across the 10 iterations. Variables declared rand are standard random variables whose values are uniformly distributed over their range: data is a 3-bit unsigned value with a legal range of 0 through 7, so with no constraints in place, every value in that range has an equal 1-in-8 chance on every single call to randomize() — including a chance of repeating the value from the call before it.

randc: Cycles Through Every Value Before Repeating

Swap rand for randc and the declaration syntax doesn't change at all — only the value-selection behavior does:

class Packet;
	randc int	 		count;
	randc byte 	 		master [$];
	randc bit [1:0] 	data [];

	...
endclass

Variables declared randc are random-cyclic: they cycle through every value in their range before any particular value repeats. We'll reuse the same class from above with one change — make data a randc variable:

class Packet;
	randc bit [2:0] data;
endclass

module tb;
	initial begin
		Packet pkt = new ();
		for (int i = 0 ; i < 10; i++) begin
			pkt.randomize ();
			$display ("itr=%0d data=0x%0h", i, pkt.data);
		end
	end
endmodule

Output

run -all;
# KERNEL: itr=0 data=0x6
# KERNEL: itr=1 data=0x3
# KERNEL: itr=2 data=0x4
# KERNEL: itr=3 data=0x7
# KERNEL: itr=4 data=0x0
# KERNEL: itr=5 data=0x1
# KERNEL: itr=6 data=0x5
# KERNEL: itr=7 data=0x2
# KERNEL: itr=8 data=0x5              // Start of a new sequence
# KERNEL: itr=9 data=0x0
# KERNEL: Simulation has finished. There are no more test vectors to simulate.

All eight values in the range 0 through 3'h7 are exhausted (itr=0 through itr=7) before any value repeats. At itr=8 a new cycle begins with a fresh, independently shuffled order — that's why 0x5 is allowed to show up again right away.

randc properties are solved before other random (rand) properties within the same object. This guarantees the cyclic behavior holds regardless of whatever the object's rand properties end up constrained to.

Common Beginner Mistakes

class Packet;
	randc bit [1:0] data;
endclass

module tb;
	initial begin
		Packet pkt = new ();
		for (int i = 0 ; i < 4; i++) begin
			pkt.randomize ();
			$display ("itr=%0d data=0x%0h", i, pkt.data);
		end
	end
endmodule