SystemVerilog #0 Delay

A common assumption about #0 is that it means "let everything else scheduled for this time step finish first, then run this." That's not quite what it does — and the gap between that assumption and what actually happens is a genuine, well-documented gotcha, directly explained by the region order established in SystemVerilog Scheduling Semantics.

11 min read | Intermediate Level

What You'll Learn

• Which region #0 actually defers execution to, and why that's earlier than many people expect
• Why a #0-delayed read can still see a stale value relative to a nonblocking assignment scheduled in the same time step
• How to correctly wait for a signal's fully settled value instead
• Why #0 is generally discouraged as a quick fix for a timing problem

What #0 Actually Does

A statement delayed by #0 is deferred from Active into the Inactive region — one step later in that same time step, not pushed out to some point after everything has settled. Critically, Inactive still runs before NBA. Anything relying on a nonblocking assignment's update to have already happened isn't safe inside a #0-delayed statement, because that update genuinely hasn't happened yet.

The Gotcha: #0 Still Runs Before NBA

Here are four different ways of reading the same signal, all triggered by the same clock edge, right after a nonblocking assignment updates it:

module tb;
  reg clk;
  reg [7:0] a;

  always #10 clk = ~clk;

  initial a = 0;

  // Updates a - the actual write is deferred to NBA
  always @ (posedge clk) begin
    a <= 5;
  end

  // Reads immediately, in Active
  always @ (posedge clk) begin
    $display ("[%0t] immediate read (Active):    a=%0d", $time, a);
  end

  // Reads after a #0 delay, in Inactive - still before NBA!
  always @ (posedge clk) begin
    #0;
    $display ("[%0t] #0-delayed read (Inactive): a=%0d", $time, a);
  end

  // Reads via $strobe, deferred to Postponed - after NBA has settled
  always @ (posedge clk) begin
    $strobe ("[%0t] strobe read (Postponed):    a=%0d", $time, a);
  end
endmodule

At the very first posedge, with a starting at 0: the immediate read executes in Active, before the nonblocking assignment's write has applied, and sees a=0. The #0-delayed read executes next, in Inactive — still before NBA — and also sees a=0, exactly the same stale value, despite having been deliberately delayed. Only the $strobe read, deferred all the way to Postponed, correctly reports a=5 once NBA has actually applied the update.

Correctly Waiting for a Settled Value

As the example shows, the reliable way to read a value after all of a time step's updates have applied is $strobe or $monitor — both execute in Postponed, guaranteed to run after every other region, including NBA, has finished. Waiting for the following clock edge works too, since by then the previous edge's NBA updates have definitely settled. #0 accomplishes neither of these.

Common Beginner Mistakes