Parallel vs Serial, Synchronous vs Asynchronous

Two choices shape every bus and interface. Does it move all the bits of a word at once over many wires, or one bit at a time over a single wire? And where does the timing come from: a clock that both sides share, or separate clocks that only agree on a rate? This article explains both choices with a byte sent over a parallel link and over a serial line, simulated side by side.

8 min read | Beginner

What You'll Learn

• Compare parallel and serial transfer in speed, pin count and cost
• Explain bit order and why both sides must agree on it
• Tell synchronous from asynchronous interfaces
• Design a simple serializer and deserializer in Verilog

Parallel: One Wire per Bit

A parallel bus has one wire for every bit of the word. An 8-bit byte moves in one clock cycle, a 32-bit word too, if the bus is 32 bits wide. On-chip buses are parallel because wires inside a chip are cheap and short: a 64-bit AXI data bus is normal.

The receiver in the example simply registers all eight bits when load is high:

module par_link (
  input            clk,
  input            rst,
  input            load,
  input      [7:0] din,
  output reg [7:0] dout,
  output reg       done
);
  always @(posedge clk) begin
    if (rst) begin
      dout <= 8'h00;
      done <= 1'b0;
    end
    else begin
      done <= load;
      if (load)
        dout <= din;
    end
  end
endmodule

Serial: One Wire, One Bit at a Time

A serial link sends the bits one after another over a single wire. The sender needs a shift register that pushes out one bit per clock, and the receiver needs a shift register that collects them. This transmitter sends the least significant bit first and raises sframe while the bits are on the line:

module ser_tx (
  input            clk,
  input            rst,
  input            load,
  input      [7:0] din,
  output           sd,
  output reg       sframe
);
  reg [7:0] sh;
  reg [3:0] n;

  assign sd = sh[0];

  always @(posedge clk) begin
    if (rst) begin
      n      <= 4'd0;
      sframe <= 1'b0;
    end
    else if (load) begin
      sh     <= din;
      n      <= 4'd8;
      sframe <= 1'b1;
    end
    else if (n != 0) begin
      sh <= sh >> 1;
      n  <= n - 4'd1;
      if (n == 4'd1)
        sframe <= 1'b0;
    end
  end
endmodule

The receiver shifts each incoming bit in from the top, sh <= {sd, sh[7:1]}, so after eight bits the first bit has moved all the way down to bit 0.

The simulation sends the byte B4 both ways. The parallel receiver has it one cycle after load; the serial receiver ten cycles after load:

35  parallel received b4
125  serial   received b4

Why Off-Chip Links Are Serial

Serial looks slower, and per clock it is. But off the chip, each pin costs package area, board space and power, and parallel wires on a board must all arrive at the same moment, which gets harder as the clock gets faster. A single serial wire avoids that skew problem and can run at a much higher bit rate. That is why UART, SPI and I2C, and also modern high-speed links such as USB and PCI Express, are serial.

Bit Order

A serial link must define which bit goes first. UART and I2C differ here: UART sends the least significant bit first, I2C the most significant bit first, and SPI devices can use either. If the sender and receiver disagree, every byte arrives mirrored. The exercise shows what that looks like.

Synchronous and Asynchronous

• Synchronous: both sides use the same clock. On-chip buses share the chip clock. SPI and I2C send their own clock on a separate wire (SCLK, SCL), so the receiver knows exactly when to sample each bit.
• Asynchronous: there is no shared clock. A UART sender and receiver each have their own clock and only agree on the bit rate, for example 115200 bits per second. The receiver finds the start of each byte from a start bit and samples the bits at the agreed rate. The UART chapter shows how.

The serial link in this article is synchronous: transmitter and receiver run on the same clock, and sframe tells the receiver which cycles carry bits.

Running It in ChipVerify Lab

The example contains the parallel link, the serial transmitter and receiver, and the testbench that sends one byte both ways. Run it and compare the two paths in the waveform.

Common Mistakes

assign sd = sh[7];
// ...
sh <= sh << 1;