In a linear testbench, the test stimuli are applied to the design sequentially, in a linear fashion, to verify the operation of the design under specific input conditions.

The linear testbench typically consists of a sequence of input vectors that are applied to the design under test, along with the expected output values for each input vector. The input vectors are usually created based on the expected behavior of the design under test, and the expected output values are obtained from the design specification.

For example, suppose we have a digital circuit that takes two 4-bit binary inputs (A and B) and performs a simple addition operation, producing a 4-bit binary output (C). The truth table for the circuit is as follows:

Input AInput BOutput C

We can create a sequence of input vectors and their corresponding expected output values based on the truth table. If the output values do not match the expected output values, the testbench indicates that the design has failed the test.

Linear testbenches are relatively simple to implement and are useful for verifying the basic functionality of a design and are usually done by digital designers to verify basic functionality and novice verification engineers.


Linear testbenches have some limitations, including:

  • Limited Test Coverage: Linear testbenches can be limited in their ability to provide comprehensive test coverage. Since they typically provide a fixed set of inputs and expected outputs, it can be difficult to ensure that all possible scenarios and edge cases are being tested.
  • Difficulty in Debugging: Linear testbenches can be challenging to debug, especially when dealing with complex designs or test scenarios. Since they follow a predefined sequence of operations, it can be difficult to isolate and debug issues that arise during simulation.
  • Limited Reusability: Linear testbenches are often specific to a particular design or set of test cases and may not be easily reusable for other designs or test cases.
  • Limited Stimulus Control: Linear testbenches provide limited control over the stimulus being applied to the DUT. The sequence of inputs is predefined, and it can be challenging to generate dynamic inputs or respond to feedback from the DUT.

Despite these limitations, linear testbenches can be useful in some situations, such as when testing simpler designs with a limited number of test scenarios. They can also be useful for initial design verification and for identifying basic functionality issues. However, as designs become more complex, the limitations of linear testbenches become more apparent, and more advanced testbench methodologies may be required.