The different phases in verification can vary depending on the specific verification flow or methodology being used. However, some common phases in verification include:

  • Planning: In this phase, the verification goals, objectives, and scope are defined, and a verification plan is developed.
  • Testbench development: This phase involves developing a testbench environment that can stimulate the design and provide appropriate inputs for testing.
  • Test creation: In this phase, tests are created based on the requirements and scenarios specified in the verification plan.
  • Test execution: The tests created in the previous phase are executed on the design, and the results are analyzed.
  • Coverage analysis: The coverage metrics of the design are analyzed to identify any coverage gaps that may exist.
  • Debugging: This phase involves identifying and resolving any design issues or bugs that are discovered during the previous phases.
  • Closure: In this final phase, the verification results are analyzed to determine whether the design meets the required specifications, and the verification process is formally concluded.


Verification can be performed at different levels of abstraction or hierarchy in a design. Here are some commonly used levels of verification:

  • Unit level: This is the lowest level of verification and involves verifying individual modules or blocks in a design. It typically involves running functional simulations and performing code coverage analysis. For example, a 4-bit adder module
  • Block level: At this level, multiple modules or blocks are integrated and verified together. The goal is to ensure that the blocks work correctly when interfaced with each other. Block-level verification typically involves running directed tests, random tests, and coverage analysis. For example, a DRAM Controller
  • Subsystem level: This level involves verifying a group of blocks or modules that work together to perform a specific function. At this level, the focus is on verifying the interfaces between the blocks and ensuring that the subsystem meets its functional requirements. For example, a Graphics Processing Unit that may consist of multiple blocks such as the rendering engine, shader core, memory interface, and display controller.
  • Chip level/SOC (System-on-Chip) level: This is the highest level of verification and involves verifying the entire chip or SOC, including all the subsystems and their interconnects. The goal is to ensure that the entire system meets its functional requirements and works as intended. This typically involves running system-level simulations, performance analysis, and formal verification. For example, a SOC that consists of a processor core, a memory controller, and several peripheral IP blocks, such as USB, Ethernet, and SATA

Each level of verification builds upon the previous level and helps to ensure that the final product meets its functional requirements.