Some chip engineers build the tools and platforms that other engineers use. CAD and methodology engineers run and improve the design flows inside chip companies, EDA software engineers write the design tools themselves, and FPGA engineers design for programmable chips that are used both as products and as prototypes. These roles suit engineers who enjoy software as much as hardware. This article describes each, based on job postings from 2025 and 2026.
7 min read | Beginner
What You'll Learn
- Describe the work of CAD and methodology engineers
- Describe the work of EDA software engineers
- Describe the work of FPGA design engineers
- List the skills these roles ask for and how to prepare
CAD and Methodology Engineers
CAD and methodology engineers build and maintain the infrastructure that design teams run on. Postings describe defining and scaling EDA infrastructure; automating design flows for synthesis, timing analysis, place and route, physical verification and extraction; building regression frameworks, dashboards and standard run scripts with Make, Python and Tcl; running jobs on compute farms with job schedulers and license servers; qualifying new versions of commercial EDA tools; and measuring how efficiently projects reach silicon[1][2][3].
Experience asked for ranges from entry-level methodology roles of zero to three years to ten or more years for senior leaders[1][3]. Some 2026 postings add integrating large language models and AI agents with EDA tool interfaces, for example to control flows in natural language[1].
EDA Software Engineers
EDA research and development engineers write the design tools: simulators, synthesis, place and route, timing analysis, verification and packaging tools. Postings from EDA companies ask mainly for strong C and C++, data structures and algorithms, and Linux development, applied to problems such as optimizing power, performance and area in place and route, building circuit simulators, and computational geometry for physical design and advanced packaging[4][5][6]. Experience asked for ranges from one to three years for junior developers to ten or more for principal engineers[5][6].
EDA companies also employ chip engineers outside development: application engineers who support customers, engineers who build reference flows, and design and verification engineers who develop IP, as How the Chip Industry Is Organized describes.
Quick Check
Q: What is the main difference between a CAD engineer at a chip company and an R&D engineer at an EDA company?
Show Answer
The CAD engineer builds and runs flows that use commercial tools for the company's own projects, mainly with scripting and infrastructure. The EDA R&D engineer writes the tools themselves, mainly in C and C++, for many customers.
FPGA Design Engineers
FPGA design engineers design logic for field-programmable gate arrays, chips whose logic can be configured after manufacture. FPGAs are used in products and as prototypes of chips before they are made, as FPGA Prototyping and Emulation explains. Postings ask for RTL design in VHDL, Verilog or SystemVerilog, the FPGA vendors' implementation tools, simulation, timing analysis and clock-domain crossing checks, and describe architecting, implementing and optimizing designs through synthesis, timing closure and hardware validation[7][8]. Experience asked for varies, with one sample asking for five or more years[7].
FPGA work shares its RTL skills with chip design, but the design targets an existing programmable chip and can be changed after deployment.
Where Is This Used?
CAD and methodology teams exist at most large chip companies and design services companies. EDA software roles are concentrated at the EDA vendors, which in 2026 advertised development roles in place and route, circuit simulation and advanced packaging[4][6]. FPGA roles appear at FPGA vendors, at companies building FPGA-based products such as equipment makers, and at chip companies using FPGA prototypes[7][8].
How the Roles Grow
New engineers in these roles usually start by maintaining parts of an existing flow or tool under a senior engineer, then own a flow, a tool feature or an FPGA design, and later lead methodology for a team, the architecture of a tool, or a product's FPGA platform. Because the work combines software and hardware, engineers in these roles can move toward pure software, toward design, or toward technical leadership of flows across a company.
Preparing for These Roles
- Verilog and SystemVerilog for RTL, used in FPGA work and in testing tools;
- RTL Synthesis, Static Timing Analysis and Physical Design for the flows that CAD engineers automate and EDA tools implement;
- ChipVerify Lab to run open-source simulation, synthesis and timing tools in the browser;
- The Common Foundation for Chip Careers for the scripting and software skills these roles assume.
Quick Check
Q: Name two ways FPGAs are used, according to this article.
Show Answer
As parts of products, and as prototypes of chips before they are manufactured.
Summary
- CAD and methodology engineers build flows, regressions and compute infrastructure with Python, Tcl and schedulers, and qualify EDA tools.
- EDA R&D engineers write design tools in C and C++, working on algorithms for synthesis, place and route, simulation and packaging.
- FPGA engineers design for programmable chips used in products and as chip prototypes.
- Some 2026 CAD postings add integrating AI agents with EDA tools.
- These roles suit engineers who combine software and hardware skills.
Sources
- CAD/flow methodology development, Tylsemi posting via Built In.
- CAD engineer, AMD posting; Principal CAD engineer, Rise.
- Engineer I, CAD (methodology), Microchip Technology posting.
- Principal R&D engineer (place and route), Synopsys.
- R&D engineer, C/C++, Synopsys; Software engineer, placement and route, Siemens.
- Principal EDA R&D engineer, advanced packaging, Synopsys.
- FPGA design engineer, Dice.
- Senior FPGA engineer, Applied Materials; Lead FPGA design engineer, Weekday.
