Why Learn Power States? Modern SoCs operate in multiple power modes—active processing, light sleep, deep sleep, retention mode—each with different voltage levels and power consumption. UPF power states formalize these operating modes, enabling tools to verify state transitions, estimate per-state power, and ensure only legal power configurations are reached. In this tutorial, you'll master defining and managing power states in UPF.

14 min read | Intermediate Level

What You'll Learn

  • Understand what power states are and why they're essential for power management
  • Define supply power states using add_power_state
  • Distinguish between legal and illegal power state combinations
  • Model state retention requirements during power transitions

Understanding Power States

A power state defines the operating condition of a supply net at a specific point in time. For each supply net, a power state specifies:

  • Voltage Level: The supply voltage (e.g., 1.2V, 1.0V, 0.9V)
  • On/Off Status: Whether the supply is active or disabled (off)
  • State Name: A descriptive identifier (ACTIVE, SLEEP, RETENTION)

Power states enable UPF to model dynamic power management where supply voltages change based on system operating mode.

Think of power states as "operating modes" for each supply net. Just as a processor has active, idle, and sleep modes, each supply net has states representing its possible voltage/on-off conditions. Power State Tables (covered later) combine individual supply states to define system-level power modes.

Why Power States Matter

  • State-Aware Simulation: Verify correct behavior during mode transitions
  • Power Estimation: Calculate power consumption for each operating mode
  • Legal State Checking: Prevent invalid supply combinations
  • Control Logic Verification: Ensure power controller implements state machine correctly

Power States in Mobile Devices

A smartphone processor might define power states like: ACTIVE (all domains at full voltage), DISPLAY_OFF (GPU at low voltage, CPU active), DEEP_SLEEP (only always-on domain powered, all other domains off), and RETENTION (CPU/GPU off but state preserved in retention cells). Each state represents a different power consumption point, allowing the OS to select the appropriate mode based on workload and battery constraints.

Syntax: add_power_state

The add_power_state command defines possible states for a supply net.

Basic Form


add_power_state supply_net_name -state {state_name voltage_or_status} [options]

Parameters

  • supply_net_name - The supply net being characterized (required)
  • -state {name value} - Define one power state (repeatable for multiple states)
  • name - Descriptive state identifier (e.g., ON, OFF, HIGH, LOW)
  • value - Voltage level (numeric) or keyword (on, off)

State Value Specifications

Value TypeSyntaxExampleMeaning
NumericVoltage in volts1.2, 1.0, 0.9Supply at specified voltage
Keyword: on"on"onSupply active (unspecified voltage)
Keyword: off"off"offSupply disabled (0V)

Usage Variations

1. Always-On Supply (Single State):


add_power_state VDD_TOP -state {ON 1.2}

2. Switchable Supply (On/Off):


add_power_state VDD_CPU \
  -state {ACTIVE 1.0} \
  -state {OFF off}

3. Multi-Voltage Supply (DVFS):


add_power_state VDD_GPU \
  -state {HIGH_PERF 1.1} \
  -state {NORMAL 0.9} \
  -state {LOW_POWER 0.7} \
  -state {OFF off}

4. Retention Supply (Always-On at Low Voltage):


add_power_state VDD_RET -state {RETENTION 0.6}

Defining Always-On Supply States

Always-on supplies remain at a constant voltage and never turn off.


# Top-level always-on supply at 1.2V
add_power_state VDD_TOP -state {ON 1.2}

# Always-on ground (always 0V)
add_power_state VSS -state {ON 0.0}

# Always-on I/O supply at 1.8V
add_power_state VDDIO -state {ON 1.8}

Single-state supplies indicate no dynamic power management—the supply is fixed at one voltage.

Even always-on supplies should have add_power_state definitions. This provides voltage information for power analysis and level shifter insertion.

Defining Switchable Supply States

Power-gated domains have supplies that can be turned on or off.


# CPU supply: Can be active (1.0V) or off
add_power_state VDD_CPU \
  -state {ACTIVE 1.0} \
  -state {OFF off}

# GPU supply: Can be active (0.9V) or off
add_power_state VDD_GPU \
  -state {ACTIVE 0.9} \
  -state {OFF off}

The off keyword indicates the supply is completely disabled—no voltage is present. This is the lowest power state (zero leakage) but requires special handling at domain boundaries (isolation cells).

Quick Check

Q: What's the difference between a state value of "0.0" and "off"?

Show Answer

0.0 means the supply is active but at 0V (like ground VSS—it's present and driven). off means the supply is completely disconnected/disabled (no driver, high-impedance). For ground, use 0.0. For power gating, use "off" to indicate the supply is shut down.

Multi-Voltage States (DVFS)

Dynamic Voltage and Frequency Scaling (DVFS) uses multiple voltage levels for the same supply based on performance needs.


# CPU with 3 voltage levels for performance/power tradeoff
add_power_state VDD_CPU \
  -state {TURBO 1.2} \        # Maximum performance, high power
  -state {NORMAL 1.0} \        # Balanced performance/power
  -state {ECO 0.8} \           # Low power, reduced performance
  -state {OFF off}             # Sleep mode

Each state represents a different performance-power operating point:

  • TURBO (1.2V): High frequency, high power, peak performance
  • NORMAL (1.0V): Standard operation
  • ECO (0.8V): Low frequency, low power, extended battery life
  • OFF: Sleep mode, zero power

DVFS is common in mobile and laptop processors where battery life matters. The operating system selects voltage/frequency based on workload: high voltage for demanding tasks, low voltage for background activity.

DVFS in Action

Modern CPUs implement aggressive DVFS: When you launch a demanding app, the CPU ramps up to 1.2V (TURBO) for maximum performance. During idle periods (reading email), it drops to 0.8V (ECO) to save battery. This dynamic voltage scaling can reduce power consumption by 50-70% during typical usage patterns, significantly extending battery life.

Retention Supply States

Retention supplies provide minimal power to preserve flip-flop state during power-down.


# Main CPU supply (switchable)
add_power_state VDD_CPU \
  -state {ACTIVE 1.0} \
  -state {OFF off}

# Retention supply (always-on, low voltage)
add_power_state VDD_CPU_RET \
  -state {RETENTION 0.6}

When the CPU enters sleep mode:

  1. Retention signal is asserted
  2. Retention cells switch from VDD_CPU to VDD_CPU_RET
  3. VDD_CPU is turned off (OFF state)
  4. VDD_CPU_RET maintains state at minimal voltage (0.6V)

This achieves near-zero leakage (most of domain is off) while preserving critical state.

Retention voltage (typically 0.6-0.8V) must be high enough to prevent data loss in retention cells but low enough to minimize leakage. This value is process-dependent and should match your technology library specifications.

Legal vs Illegal Power States

Not all combinations of individual supply states are valid. Legal states are allowed combinations; illegal states are forbidden.

Examples of Legal States

System ModeVDD_TOPVDD_CPUVDD_GPUValid?
Full ActiveON (1.2V)ACTIVE (1.0V)ACTIVE (0.9V)✓ Legal
GPU IdleON (1.2V)ACTIVE (1.0V)OFF✓ Legal
Deep SleepON (1.2V)OFFOFF✓ Legal

Examples of Illegal States

ConditionVDD_TOPVDD_CPUVDD_GPUWhy Illegal?
Top-level offOFFACTIVEACTIVECPU/GPU can't be active if top-level control is off
Invalid dependencyONOFFACTIVEGPU depends on CPU for control (design-specific rule)

Power State Tables (PST), covered in Module 5, formalize legal state combinations. For now, understand that individual supply states are building blocks—not all combinations are permissible.

State Retention During Transitions

When a domain transitions from ACTIVE to OFF, certain state must be retained.

Without Retention


# Transition: VDD_CPU ACTIVE → OFF
# All flip-flop contents are lost
# Wake-up requires full reinitialization

With Retention


# Power states
add_power_state VDD_CPU \
  -state {ACTIVE 1.0} \
  -state {OFF off}

add_power_state VDD_CPU_RET \
  -state {RETENTION 0.6}

# Transition sequence:
# 1. Assert retention signal (switches retention FFs to VDD_CPU_RET)
# 2. VDD_CPU transitions: ACTIVE → OFF
# 3. VDD_CPU_RET remains in RETENTION state
# 4. Retention cells preserve state using VDD_CPU_RET
# 5. Wake-up: VDD_CPU transitions OFF → ACTIVE
# 6. De-assert retention signal (switches FFs back to VDD_CPU)
# 7. Execution resumes with preserved state

This retention mechanism enables fast wake-up without software re-initialization, crucial for responsive power management.

Quick Check

Q: Why do retention supplies use lower voltage than active supplies?

Show Answer

Retention cells only need to preserve state (hold data), not perform computation. The minimum voltage to prevent data loss (retention voltage, ~0.6V) is much lower than the voltage needed for switching/computation (~1.0V). Using lower retention voltage minimizes leakage power during sleep while maintaining state integrity.

Practical Example: Complete Power State Definition


# ===================================================================
# Power State Definition for Multi-Domain SoC
# ===================================================================

# TOP DOMAIN: Always-on at 1.2V
add_power_state VDD_TOP -state {ON 1.2}
add_power_state VSS -state {ON 0.0}

# CPU DOMAIN: Switchable with retention
add_power_state VDD_CPU \
  -state {ACTIVE 1.0} \
  -state {OFF off}

add_power_state VDD_CPU_RET \
  -state {RETENTION 0.6}

# GPU DOMAIN: Multi-voltage (DVFS) with power gating
add_power_state VDD_GPU \
  -state {HIGH_PERF 1.1} \
  -state {NORMAL 0.9} \
  -state {LOW_POWER 0.7} \
  -state {OFF off}

# I/O DOMAIN: Always-on at 1.8V (I/O voltage)
add_power_state VDDIO -state {ON 1.8}

# ===================================================================
# System Power Modes (example combinations):
#
# FULL_ACTIVE:
#   VDD_TOP=ON, VDD_CPU=ACTIVE, VDD_GPU=HIGH_PERF, VDDIO=ON
#
# BALANCED:
#   VDD_TOP=ON, VDD_CPU=ACTIVE, VDD_GPU=NORMAL, VDDIO=ON
#
# ECO_MODE:
#   VDD_TOP=ON, VDD_CPU=ACTIVE, VDD_GPU=LOW_POWER, VDDIO=ON
#
# DISPLAY_OFF:
#   VDD_TOP=ON, VDD_CPU=ACTIVE, VDD_GPU=OFF, VDDIO=ON
#
# DEEP_SLEEP:
#   VDD_TOP=ON, VDD_CPU=OFF, VDD_GPU=OFF, VDDIO=ON
#   (VDD_CPU_RET=RETENTION preserves CPU state)
# ===================================================================

SoC Power Mode Management

A smartphone's power management controller implements a finite state machine transitioning between power modes based on user activity and system events. For example: Screen-on → FULL_ACTIVE, Screen-off (music playing) → DISPLAY_OFF (GPU off), Idle timeout → DEEP_SLEEP (CPU/GPU off with retention). Each transition involves changing supply states as defined in UPF, with hardware ensuring correct sequencing of isolation, retention, and power switch control.

Power State Dependencies

Some supply states have dependencies—certain states require others.

Hierarchical Dependencies

Child domains typically can't be active if parent is off:


# LEGAL: Parent ON, child ACTIVE
VDD_TOP = ON (1.2V)
VDD_CPU = ACTIVE (1.0V)

# ILLEGAL: Parent OFF, child ACTIVE
VDD_TOP = OFF
VDD_CPU = ACTIVE (1.0V)  # Can't be active if parent is off

Functional Dependencies

Some blocks depend on others for functionality:


# Example: GPU requires CPU for command processing

# LEGAL: Both active or both off
VDD_CPU = ACTIVE, VDD_GPU = ACTIVE
VDD_CPU = OFF, VDD_GPU = OFF

# ILLEGAL: GPU active without CPU (design-specific constraint)
VDD_CPU = OFF, VDD_GPU = ACTIVE

These dependencies are enforced through Power State Tables (PST) in Module 5.

Common Beginner Mistakes

Mistake #1: Defining states for non-existent supply nets


# WRONG: VDD_CPU not created yet
add_power_state VDD_CPU -state {ACTIVE 1.0}

# CORRECT: Create supply net first
create_supply_net VDD_CPU -domain PD_CPU
add_power_state VDD_CPU -state {ACTIVE 1.0} -state {OFF off}

Why? Power states describe supply nets. The net must exist before you can define its states.

Mistake #2: Using "0.0" instead of "off" for power-gated supplies


# WRONG: 0.0 means supply is active at 0V (like ground)
add_power_state VDD_CPU -state {SLEEP 0.0}

# CORRECT: Use "off" to indicate supply is disabled
add_power_state VDD_CPU -state {ACTIVE 1.0} -state {SLEEP off}

Why? 0.0 indicates an active supply at zero volts. off indicates the supply is completely shut down (power-gated).

Mistake #3: Forgetting to define states for always-on supplies


# INCOMPLETE: VDD_TOP has no state definition
create_supply_net VDD_TOP -domain PD_TOP

# COMPLETE: Define state even for always-on supplies
create_supply_net VDD_TOP -domain PD_TOP
add_power_state VDD_TOP -state {ON 1.2}

Why? Power analysis and level shifter insertion need voltage information. Even fixed supplies should have add_power_state definitions specifying their voltage.

Practice Exercise

Challenge: Define Power States for a Mobile SoC

Given the following domains and requirements, define appropriate power states:

  • VDD_AON: Always-on at 1.2V
  • VDD_APP: Application processor, DVFS with 3 levels (1.2V, 1.0V, 0.8V) and OFF
  • VDD_MODEM: Modem, 2 levels (1.0V for active, 0.9V for idle) and OFF
  • VDD_MODEM_RET: Modem retention at 0.6V (always-on)
  • VDDIO: I/O at 1.8V (always-on)
  • VSS: Ground

Write add_power_state commands for all supplies.

Hint

Always-on supplies need one state. DVFS supplies need multiple active states plus OFF. Retention supplies need one state at retention voltage. Use descriptive state names (HIGH_PERF, NORMAL, ECO, ACTIVE, IDLE, OFF, RETENTION).

Solution

# ===================================================================
# Power State Definitions for Mobile SoC
# ===================================================================

# Always-on supplies (single state)
add_power_state VDD_AON -state {ON 1.2}
add_power_state VDDIO -state {ON 1.8}
add_power_state VSS -state {ON 0.0}

# Application processor (DVFS: 3 voltage levels + OFF)
add_power_state VDD_APP \
  -state {HIGH_PERF 1.2} \    # Maximum performance
  -state {NORMAL 1.0} \        # Balanced mode
  -state {ECO 0.8} \           # Power saving
  -state {OFF off}             # Sleep mode

# Modem (2 active levels + OFF)
add_power_state VDD_MODEM \
  -state {ACTIVE 1.0} \        # Full modem operation
  -state {IDLE 0.9} \          # Connected but low activity
  -state {OFF off}             # Airplane mode / deep sleep

# Modem retention supply (always-on at retention voltage)
add_power_state VDD_MODEM_RET \
  -state {RETENTION 0.6}

# ===================================================================
# Example System Power Modes:
#
# HIGH_PERFORMANCE:
#   VDD_AON=ON, VDD_APP=HIGH_PERF, VDD_MODEM=ACTIVE, VDDIO=ON
#
# NORMAL_USE:
#   VDD_AON=ON, VDD_APP=NORMAL, VDD_MODEM=ACTIVE, VDDIO=ON
#
# BATTERY_SAVER:
#   VDD_AON=ON, VDD_APP=ECO, VDD_MODEM=IDLE, VDDIO=ON
#
# SCREEN_OFF:
#   VDD_AON=ON, VDD_APP=ECO, VDD_MODEM=IDLE, VDDIO=ON
#
# DEEP_SLEEP:
#   VDD_AON=ON, VDD_APP=OFF, VDD_MODEM=OFF, VDDIO=ON
#   (VDD_MODEM_RET=RETENTION preserves modem state)
# ===================================================================

Summary

In this tutorial, you learned:

  • Power states define operating conditions (voltage level and on/off status) for supply nets, enabling dynamic power management
  • add_power_state defines states with -state {name value}, where value is voltage (numeric) or "on"/"off" (keyword)
  • Always-on supplies have single states (constant voltage), while power-gated supplies have ACTIVE and OFF states
  • DVFS (Dynamic Voltage Frequency Scaling) uses multiple voltage states for performance-power tradeoffs (HIGH_PERF, NORMAL, ECO)
  • Retention supplies enable state preservation during power-down using low voltage (~0.6V) to minimize leakage while maintaining data
  • Not all supply state combinations are legal—Power State Tables (next module) formalize valid system power modes and dependencies
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