UPF Isolation Strategies

Choosing the wrong clamp value can cause functional errors even with isolation in place. Analyze receiving logic to determine safe values. When in doubt, use 0 for most signals, but verify with design requirements.

Isolation Control Signals

The -isolation_signal and -isolation_sense control when isolation is active.

Active-High Isolation (isolation_sense high)

set_isolation ISO_GPU -domain PD_GPU \
  -isolation_supply_set SS_TOP \
  -clamp_value 0 \
  -isolation_signal iso_gpu_enable \
  -isolation_sense high

Behavior:

• iso_gpu_enable = 0: Isolation disabled (signals pass through)
• iso_gpu_enable = 1: Isolation active (outputs clamped to 0)

Active-Low Isolation (isolation_sense low)

set_isolation ISO_CPU -domain PD_CPU \
  -isolation_supply_set SS_TOP \
  -clamp_value 0 \
  -isolation_signal iso_cpu_n \
  -isolation_sense low

Behavior:

• iso_cpu_n = 1: Isolation disabled (signals pass through)
• iso_cpu_n = 0: Isolation active (outputs clamped to 0)

Power Sequencing with Isolation

Proper isolation timing is critical:

Power-Down Sequence:
1. Assert isolation signal (iso_enable = 1)
   → Isolation cells clamp outputs to safe values
2. Wait for isolation to propagate
3. De-assert power enable
   → Power switch opens, domain loses power
4. Domain OFF, outputs safely clamped by isolation cells

Power-Up Sequence:
1. Assert power enable
   → Power switch closes, domain receives power
2. Wait for VDD_domain to stabilize
3. Release reset
4. De-assert isolation signal (iso_enable = 0)
   → Isolation cells pass real signals
5. Domain fully operational

Isolation must be asserted before power-down and de-asserted after power-up and reset release. This ensures outputs are clamped to safe values during the entire period when the domain is unpowered or resetting.

Isolation Cell Location

The -location option controls where isolation cells are placed.

Location Options

Parent Location (Recommended)

set_isolation ISO_GPU -domain PD_GPU \
  -isolation_supply_set SS_TOP \
  -clamp_value 0 \
  -isolation_signal iso_gpu \
  -isolation_sense high \
  -location parent

Power-Gated Domain (VDD_GPU)    Always-On Domain (VDD_TOP)
┌─────────────────────┐         ┌────────────────────────┐
│  Logic          ────┼────────>│ [Isolation Cell]       │
│                     │         │ (powered by VDD_TOP)   │
│  (can be OFF)       │         │        ↓               │
└─────────────────────┘         │   Always-On Logic      │
                                └────────────────────────┘

Benefits:

• Isolation cells remain powered when domain is off
• Cleaner physical design (isolation at domain boundary)
• Standard approach for most designs

Use -location parent as default for isolation. This ensures isolation cells are in the always-on domain where they can function during power-down. Only use -location self if you have specific physical design constraints requiring isolation inside the gated domain.

Complete Isolation Example

# ===================================================================
# Complete Power Gating with Isolation
# ===================================================================

# TOP DOMAIN: Always-on
create_power_domain PD_TOP -include_scope
create_supply_net VDD_TOP -domain PD_TOP
create_supply_net VSS -domain PD_TOP

create_supply_set SS_TOP \
  -function {power VDD_TOP} \
  -function {ground VSS}
associate_supply_set SS_TOP -handle PD_TOP

add_power_state VDD_TOP -state {ON 1.2}

# GPU DOMAIN: Power-gated (no retention)
create_power_domain PD_GPU -elements {gpu_inst}
create_supply_net VDD_GPU -domain PD_GPU
create_supply_net VSS -domain PD_GPU

create_supply_set SS_GPU \
  -function {power VDD_GPU} \
  -function {ground VSS}
associate_supply_set SS_GPU -handle PD_GPU

add_power_state VDD_GPU \
  -state {ACTIVE 0.9} \
  -state {OFF off}

# Power switch
create_power_switch PSW_GPU -domain PD_GPU \
  -input_supply_port {vin VDD_TOP} \
  -output_supply_port {vout VDD_GPU} \
  -control_port {ctrl gpu_power_enable} \
  -on_state {on vin {ctrl}}

# Isolation strategy
set_isolation ISO_GPU -domain PD_GPU \
  -isolation_supply_set SS_TOP \
  -clamp_value 0 \
  -isolation_signal gpu_iso_enable \
  -isolation_sense high \
  -location parent

# ===================================================================
# Power-Down Sequence:
# 1. Assert gpu_iso_enable = 1 (activate isolation, clamp to 0)
# 2. De-assert gpu_power_enable = 0 (turn off power switch)
# 3. VDD_GPU = OFF, GPU outputs safely clamped by isolation cells
#
# Power-Up Sequence:
# 1. Assert gpu_power_enable = 1 (turn on power switch)
# 2. Wait for VDD_GPU stable at 0.9V
# 3. Release reset to GPU
# 4. De-assert gpu_iso_enable = 0 (disable isolation, pass signals)
# 5. GPU fully operational
# ===================================================================

Mapping Isolation Cells to Library

UPF isolation strategies are mapped to physical library cells during synthesis.

Syntax: map_isolation_cell

map_isolation_cell strategy_name -domain domain_name \
  -lib_cells {cell_list}

Example

# Map isolation strategy to AND-based isolation cells (clamp to 0)
map_isolation_cell ISO_GPU -domain PD_GPU \
  -lib_cells {
    ISO_AND_0_X1    # Standard drive
    ISO_AND_0_X2    # 2× drive
    ISO_AND_0_X4    # 4× drive
  }

# Map strategy with clamp to 1 to OR-based cells
map_isolation_cell ISO_MODEM -domain PD_MODEM \
  -lib_cells {
    ISO_OR_1_X1
    ISO_OR_1_X2
  }

Synthesis tools select appropriate drive strengths based on fanout and timing requirements.

Isolation cell naming is technology-specific. Common patterns: ISO_AND_0 (AND-based, clamps to 0), ISO_OR_1 (OR-based, clamps to 1), with drive strength suffixes (_X1, _X2, _X4). Consult your standard cell library for available isolation cells.

Isolation Combined with Retention

Power-gated domains with retention need both isolation and retention strategies.

# ===================================================================
# Power Gating with Retention AND Isolation
# ===================================================================

create_power_domain PD_CPU -elements {cpu_inst}

# Supplies
create_supply_net VDD_CPU -domain PD_CPU
create_supply_net VDD_CPU_RET -domain PD_CPU
create_supply_net VSS -domain PD_CPU

# Supply sets
create_supply_set SS_CPU_ACTIVE \
  -function {power VDD_CPU} \
  -function {ground VSS}

create_supply_set SS_CPU_RET \
  -function {power VDD_CPU_RET} \
  -function {ground VSS}

associate_supply_set SS_CPU_ACTIVE -handle PD_CPU

# Power states
add_power_state VDD_CPU -state {ACTIVE 1.0} -state {OFF off}
add_power_state VDD_CPU_RET -state {RETENTION 0.6}

# Power switch
create_power_switch PSW_CPU -domain PD_CPU \
  -input_supply_port {vin VDD_TOP} \
  -output_supply_port {vout VDD_CPU} \
  -control_port {ctrl cpu_power_enable} \
  -on_state {on vin {ctrl}}

# Retention strategy
set_retention RET_CPU -domain PD_CPU \
  -retention_supply_set SS_CPU_RET \
  -retention_condition {cpu_retention_enable}

# Isolation strategy
set_isolation ISO_CPU -domain PD_CPU \
  -isolation_supply_set SS_TOP \
  -clamp_value 0 \
  -isolation_signal cpu_iso_enable \
  -isolation_sense high \
  -location parent

# ===================================================================
# Power-Down Sequence (with retention):
# 1. Assert cpu_retention_enable (save state to VDD_CPU_RET)
# 2. Assert cpu_iso_enable (activate isolation)
# 3. De-assert cpu_power_enable (turn off VDD_CPU)
# 4. CPU off, state retained, outputs isolated
#
# Power-Up Sequence:
# 1. Assert cpu_power_enable (restore VDD_CPU)
# 2. De-assert cpu_retention_enable (switch FFs back to VDD_CPU)
# 3. De-assert cpu_iso_enable (disable isolation)
# 4. CPU operational with retained state
# ===================================================================

Common Beginner Mistakes

# WRONG: Isolation cells use gated supply (will lose power!)
set_isolation ISO_GPU -domain PD_GPU \
  -isolation_supply_set SS_GPU \  # GPU supply gets turned off!
  -clamp_value 0 \
  -isolation_signal iso_gpu \
  -isolation_sense high

# CORRECT: Use always-on supply from parent/top domain
set_isolation ISO_GPU -domain PD_GPU \
  -isolation_supply_set SS_TOP \  # Always-on supply
  -clamp_value 0 \
  -isolation_signal iso_gpu \
  -isolation_sense high

# Consider an active-low reset signal: reset_n
# WRONG: Clamping to 0 puts receiving logic in reset
set_isolation ISO_BAD -domain PD_PERIPH \
  -isolation_supply_set SS_TOP \
  -clamp_value 0 \    # This asserts reset! (reset_n = 0 = active)
  -isolation_signal iso \
  -isolation_sense high

# CORRECT: Clamp to 1 to keep receiving logic out of reset
set_isolation ISO_GOOD -domain PD_PERIPH \
  -isolation_supply_set SS_TOP \
  -clamp_value 1 \    # reset_n = 1 = inactive (not in reset)
  -isolation_signal iso \
  -isolation_sense high

# ===================================================================
# Complete Power Gating: DSP with Retention and Isolation
# ===================================================================

# TOP DOMAIN (always-on context)
create_power_domain PD_TOP -include_scope
create_supply_net VDD_TOP -domain PD_TOP
create_supply_net VSS -domain PD_TOP

create_supply_set SS_TOP \
  -function {power VDD_TOP} \
  -function {ground VSS}
associate_supply_set SS_TOP -handle PD_TOP

add_power_state VDD_TOP -state {ON 1.2}

# DSP DOMAIN with retention and isolation
create_power_domain PD_DSP -elements {dsp_engine}

# Supply nets
create_supply_net VDD_DSP -domain PD_DSP
create_supply_net VDD_DSP_RET -domain PD_DSP
create_supply_net VSS -domain PD_DSP

# Active supply set
create_supply_set SS_DSP_ACTIVE \
  -function {power VDD_DSP} \
  -function {ground VSS}

# Retention supply set
create_supply_set SS_DSP_RET \
  -function {power VDD_DSP_RET} \
  -function {ground VSS}

associate_supply_set SS_DSP_ACTIVE -handle PD_DSP

# Power states
add_power_state VDD_DSP \
  -state {ACTIVE 0.9} \
  -state {OFF off}

add_power_state VDD_DSP_RET \
  -state {RETENTION 0.6}

add_power_state VSS -state {ON 0.0}

# Power switch
create_power_switch PSW_DSP -domain PD_DSP \
  -input_supply_port {vin VDD_TOP} \
  -output_supply_port {vout VDD_DSP} \
  -control_port {ctrl dsp_power_enable} \
  -on_state {on vin {ctrl}}

# Retention strategy
set_retention RET_DSP -domain PD_DSP \
  -retention_supply_set SS_DSP_RET \
  -retention_condition {dsp_retention_enable}

# Isolation strategy
set_isolation ISO_DSP -domain PD_DSP \
  -isolation_supply_set SS_TOP \
  -clamp_value 0 \
  -isolation_signal dsp_iso_enable \
  -isolation_sense high \
  -location parent

# ===================================================================
# Complete Power Sequencing:
#
# Power-Down:
# 1. dsp_retention_enable = 1 (save state)
# 2. dsp_iso_enable = 1 (activate isolation, clamp to 0)
# 3. dsp_power_enable = 0 (turn off VDD_DSP)
# 4. DSP off, state retained, outputs isolated
#
# Power-Up:
# 1. dsp_power_enable = 1 (restore VDD_DSP to 0.9V)
# 2. Wait for VDD_DSP stable
# 3. Release DSP reset
# 4. dsp_retention_enable = 0 (restore state)
# 5. dsp_iso_enable = 0 (disable isolation, pass signals)
# 6. DSP fully operational
# ===================================================================