Data that cannot be processed is quite useless, there'll always be some form calculation required in digital circuits and computer systems. Let's look at some of the operators in Verilog that would enable synthesis tools realize appropriate hardware elements.

##### Arithmetic

If the second operand of a division or modulus operator is zero, then the result will be X. If either operand of the power operator is real, then the result will also be real. The result will be 1 if the second operand of a power operator is 0 (a0).

Operator Description
a + b a plus b
a - b a minus b
a * b a multiplied by b
a / b a divided by b
a % b a modulo b
a ** b a to the power of b

An example of how arithmetic operators are used is given below.

```
module des;
reg [7:0]  data1;
reg [7:0]  data2;

initial begin
data1 = 45;
data2 = 9;

\$display ("Add + = %d", data1 + data2);
\$display ("Sub - = %d", data1 - data2);
\$display ("Mul * = %d", data1 * data2);
\$display ("Div / = %d", data1 / data2);
\$display ("Mod %% = %d", data1 % data2);
\$display ("Pow ** = %d", data2 ** 2);

end
endmodule
```
Simulation Log
```ncsim> run