Circuits are not always built from scratch. Usually smaller components are clubbed together to form bigger ones. For example, you can create a single bit adder and connect four instances of the adder to form a 4-bit adder. This property is exploited by the feature of having modules in Verilog. Another example is the breakdown of a simple GPU into smaller components each that can be encapsulated as a module to perform a specific functionality.
A module is a block of verilog code that implements a certain functionality which can be reused as a part of building something bigger or used as a standalone unit. Modules can be embedded within other modules where a higher level module can communicate with its lower level modules using their input and output ports. A module should be enclosed within module and endmodule keywords. Name of the module should be given right after the module keyword and an optional list of ports may be declared as well. Note that ports declared in the list of port declarations cannot be redeclared within the body of the module.