At times it would be much easier to write a generic class which can be instantiated in multiple ways to achieve different array sizes or data types. This avoids the need to re-write code for specific features like size or type and instead allow a single specification to be used for different objects. This is achieved by extending the System Verilog parameter mechanism to classes.
Given below is a parameterized class which has size as the parameter that can be changed during instantiation.
class something #(intsize=8);bit[size-1:0] out;endclassmodule tb;
something #(16) sth;// object with vector of size 16
something #(.size(32)) sth;// object with vector of size 32typedef something #(4) td_nibble;// class with vector of size 4.endmodule
A very common usage for parameterized classes is in defining types as parameters. The same class can be used for creating objects with dynamic arrays of different data-types.