Verilog has reg and wire data-types to describe hardware behavior. Since verification of hardware can become more complex and demanding, datatypes in Verilog are not sufficient to develop efficient testbenches and testcases. Hence System Verilog has extended Verilog by adding more C like data-types for better encapsulation and compactness.

Types that can have unknown and high-impedance value are called 4-state types. In a typical verification testbench, there are many cases where we don't really need all the four values (0, 1, x, z) like for example when modeling a network packet with a header that specifies the length of the packet. System Verilog adds many new 2-state data types that can only store and have a value of either 0 or 1. This will aid in faster simulation, take less memory and are preferred in some design styles. When a 4-state value is converted to a 2-state value, any unknown or high-impedance bits shall be converted to zeros.

System Verilog extends the reg data-type in Verilog to a new data-type called logic whose variables can be assigned in either procedural blocks or continuous assignment statements. But, a signal with more than one driver needs to be declared a net-type such as wire so that System Verilog can resolve the final value.

  logic   [7:0]   my_data;
  // Procedural block
  initial begin
    #10  my_data = 8'hfe;
  // Continuous assignment
  assign  my_data = 8'h1a;
system-verilog data-types
Signed and Unsigned Integer Types

Integer types use integer arithmetic and can be signed or unsigned. The signedness can be explicitly defined using the keywords signed and unsigned. Also they can be converted into one another by casting.

  int   unsigned   ui;     
  int   signed     si;
  byte  unsigned   ubyte;
  // ubyte is converted to signed type and assigned to si
  si = signed' (ubyte);
void data-type

The void data-type represents non-existing data, and can specified as the return type of functions and tasks to indicate no return value.

function void display ();
  $display ("Am not going to return any value");
task void display ();
  #10 $display ("Me neither");
Conversion of real to int

Real numbers will be converted to integers by rounding the real number to the nearest integer instead of truncating it. If the fractional part is exactly 0.5, it will be rounded away from zero. Explicit conversion can be specified using casting or using system tasks. Directly assigning a real value to an integral type will also round instead of truncate.

  // Casting will perform rounding
  int'(2.0 * 3.0)
  shortint'({8'hab, 8'hef}) 
  // Using system tasks will truncate
  integer    $rtoi ( real_val )
  real     $itor ( int_val)

Was this article helpful ?